With the recent evolution of the electronics, there have been required printed circuit boards and wiring boards on which at least one LSI is to be mounted, formed to have a finer wiring pattern that assures a higher packaging density and reliability for a more compact design of electronic devices and higher speed of signal transmission.
On this account, it has recently been proposed to form a conductor circuit on a wiring board by applying an interlayer dielectric material to the surface of a substrate to form an interlayer dielectric layer, roughing the surface of the interlayer dielectric layer and forming the circuit by the additive or semi-additive method.
As the interlayer dielectric material used in the additive or semi-additive method, there is widely used a resin in which spherical particles such as inorganic particles are added to a resin mixture of thermosetting resin and/or photosensitive resin and thermoplastic resin (as disclosed in the Japanese Patent Application Laid Open No. 2003-73649).
The addition of such inorganic particles is intended to reduce the coefficient of thermal expansion of the interlayer dielectric material for making it difficult for any crack to occur in the interlayer dielectric layer and a bump between an IC and printed wiring board.
Recently, however, air is mixed in the dielectric layer of an IC chip for mounting on a printed wiring board to attain a higher driving frequency. Since the air-containing dielectric layer of the IC chip is fragile, it is necessary to further reduce the coefficient of thermal expansion of the interlayer dielectric layer. To attain such a lower coefficient of thermal expansion, it is required to increase the content of spherical inorganic particles to be added to the resin that forms the interlayer dielectric layer.
With the content of the spherical particles being increased, the coefficient of thermal expansion of the interlayer dielectric layer is reduced but crack is more likely to occur in the interlayer dielectric layer. However, if the content of the particles is excessive, the particles will remain in the viahole, leading to a lower connection reliability. Especially, viaholes of less than 70 μm in opening diameter will incur such lower connection reliability.
Also, since the particles in the interlayer dielectric layer are of about 5 to 10 μm in size, the irregularity (concavity and convexity) formed on the surface of the interlayer dielectric layer formed by curing the interlayer dielectric material will also be of 5 to 10 μm. Therefore, it is difficult to form a fine pattern of less than 15 μm/15 μm in L/S (line width/interline space), and the irregularity of the interlayer dielectric layer surface makes it difficult to form an interlayer dielectric layer having a uniform thickness. Thus, it is also difficult to control the impedance in transmitting a signal of 3 GHz or higher in frequency.
To form a circuit by the aforementioned additive or semi-additive method, a fine pattern is normally formed by transcribing the pattern optically. For example, a pattern of a photo mask is transcribed to a photosensitive resist by placing the photo mask directly or indirectly on the photosensitive resist and irradiating light to the photo mask from the back of the photo mask to selectively expose resist portions through which the light has passed.
The above-mentioned conventional pattern-forming method is not advantageous in that a pattern having a one-to-one relation with the pattern of the photo mask cannot be formed because of the influence of the light diffraction and miniaturization of the pattern is limited because the resist will be made to fly in all directions under a pressure applied during spray development.
On the other hand, S. Y. Chou et al. have proposed a method, called “imprint method”, very simple but suitable for use in mass production and capable of transcribing a finer pattern than with the conventional techniques (as in the Applied Physical Letters, Vol. 67, No. 21, pp. 3114-3116 (1995) and U.S. Pat. No. 5,772,905).
The “imprint method” proposed by the S. Y. Chou et al. will briefly be explained herebelow with reference to FIG. 19.
(1) First, a silicon substrate 202 having a silicon dioxide film 204 formed on the surface thereof is prepared, and a reversal pattern corresponding to a mirror image of a pattern to be transcribed is formed on the silicon dioxide film 204. The silicon dioxide film 204 can be patterned using the normal electron beam transcription, for example. Thus, a mold 200 is formed which has formed on the surface thereof an irregularity 203 corresponding to the mirror image of the pattern to be transcribed (as shown in FIG. 19(a)).
(2) Next, a dielectric material such as PMMA (polymethylmethacrylate) or the like is applied to a silicon substrate 210 going to be patterned, and cured to form a dielectric layer 212 on the silicon substrate 210. Further, the silicon substrate 210 having the dielectric layer 212 thus formed thereon is heated at a temperature of about 200° C. to soften the dielectric layer 212.
(3) The mold 200 formed in the step (1) is superposed on the silicon substrate 210 with the side thereof on which the irregularity 203 is formed being placed opposite to the surface (coated side) of the dielectric layer 212 on the silicon substrate 210. Thereafter, the mold 200 is pressed to the surface of the silicon substrate 210 with a pressure equivalent to a barometric pressure of about 140 hPa (as shown in FIG. 19(b)).
(4) Next, with the mold 200 being kept pressed to the silicon substrate 210, the temperature is lowered to about 105° C. to cure the dielectric layer 212, and then the mold 200 is removed. Thus, on the dielectric layer 212 on the silicon substrate 210, there will be formed a mirror-image pattern corresponding to the pattern of the irregularity 203 on the mold 200, that is, a pattern 214 going to be formed on the silicon substrate 210 (as shown in FIG. 19(c)).
For miniaturization of wiring, the “imprint method” was proposed as mentioned above. The “imprint method” was found not advantageous in application to the pattern-forming process in production of a multilayer printed wiring board as will be described below:
Firstly, when a thermoplastic resin such as PMMA used in the “imprint method” is used as an interlayer dielectric material for forming a multilayer printed wiring board, lower layers of the interlayer dielectric material will be softened at the same time in the pattern-forming process for the multilayer printed wiring board. The position and shape of the pattern and thickness of the interlayer dielectric layer cannot be maintained. That is, no multilayering is possible.
For example, in the step of forming a pattern on the first interlayer dielectric layer, a wiring pattern and viahole can be formed without any problem. To form a second interlayer dielectric layer and a wiring pattern on the second interlayer dielectric layer, there should be provided a step of softening the second interlayer dielectric layer. However, it is difficult to heat only the second interlayer dielectric layer. That is, when the second interlayer dielectric layer is heated to a temperature, the first interlayer dielectric layer is also heated up to the same temperature. Thus, the first interlayer dielectric layer will also be softened.
Thus, the first interlayer dielectric layer will be fluidized under a pressure applied during forming a wiring pattern on the second interlayer dielectric layer. The wiring pattern formed in the first interlayer dielectric layer will move, resulting in misalignment with an upper layer, short-circuiting between adjacent patterns and crushing of the interlayer dielectric layer under the pressure. Therefore, the reliability on the interlayer connection will be lower.
Secondly, it is difficult to maintain, after the mold is removed, the shape of the wiring pattern-forming groove transcribed from the mold to the interlayer dielectric layer and shape of the viahole-forming groove.
The reason for the above is that the step of removing the mold is followed by a step of heat treatment in which the interlayer dielectric layer will be softened. Especially, when the interlayer dielectric layer is softened in the heat-treatment step, the grooves transcribed to the interlayer dielectric layer is shaped to have such a trapezoidal form that the space between conductor circuits filled in the wiring pattern-forming groove and viahole-forming groove is narrowed. That is, to assure high insulation reliability, the wiring pattern may not be miniaturized.
Thirdly, the aforementioned “imprint method” does not include any measure to assure a good adhesion between an interlayer dielectric layer of a thermoplastic resin and the wiring pattern. If the “imprint method” is applied as it is to production of a multilayer printed wiring layer, the latter will not be highly reliable.
For example, in case the side walls and bottom of the wiring pattern-forming groove and viahole-forming groove, transcribed from the mold, are flat, the adhesion between the conductor circuit filled in the grooves and the interlayer dielectric layer will not be sufficient. Further, the finer the wiring pattern, the more easily the conductor circuit (copper or the like) will be separated due to a difference in coefficient of thermal expansion between the conductor circuit and resin and the more possibly crack will occur at the boundary between the conductor circuit and resin. Therefore, no multilayer printed wiring board that is highly reliable can be produced by the “imprint method”.
Fourthly, in case the “imprint method” is applied directly to the pattern-forming process for a multilayer printed wiring board, the interlayer dielectric layer has to be heated up to a temperature of about 200° C. However, the mold having been subjected to a cycle between such a high temperature and the normal temperature will not able to restore its initial shape.
Also, because the mold is used at such a high temperature, it is extremely difficult to assure any high dimensional accuracy of the mold. For transcription of the shape of a mold to an interlayer dielectric layer, the assembly of the mold and layer is heated at a temperature higher than 200° C. However, since the mold is prepared at the normal temperature, it has to be formed with the thermal expansion thereof being taken in consideration. It is very difficult to correct the shape correction of the mold in the step of mold preparation, and the mold thus prepared cannot be used repeatedly. Therefore, the mold itself is very expensive.